| 摘要 |
<p>PURPOSE:To maintain reliability high by connecting two memory cells constituting one bit data memory body to one data line while sharing the drain. CONSTITUTION:In a read mode, a word line WL is set at 5V, a data line DL is set at about 1V and a control gate CG is set at 0V. Assuming that a data 1 is stored in the memory cell, no current flows to both two transistors 2A and 2B in reading. Assuming that a data 0 is stored, namely, that a positive hole is injected to floating gates 95 and 95 of the two transistors 2A and 2B, the threshold values of the transistors 2A and 2B are turned to -5V. Thus, in the case of reading, both of the two transistors 2A and 2B are turned on and the current flows through the data line DL to transistors 1A, 2A, 1B and 2B.</p> |
