发明名称 REDUCTION PROCESSOR
摘要 A reduction processor is provided, which is controlled by a program having a structure and which is adapted to reduce said structure in a number of reduction steps including different kinds of reductions. A first order processor of this kind includes an active storage (1, 2) in turn including a) a plurality of active storage cells, each able to store information, which could give rise to a reduction. b) A communication net communicating the result of each reduction to all cells having connection to said result. The processor includes a control means (6) in common for all the storage cells. Preferably, at least one of the storage cells, called core cell (2) or structure arithmetic unit, is able to perform all kinds of reductions, and the rest of said cells, called object storage cells, are able to perform only limited parts of some of all kinds of reductions. Further, several reduction processors could be connected to each other by a network and thereby form a higher order reduction processor.
申请公布号 WO9202876(A1) 申请公布日期 1992.02.20
申请号 WO1991SE00516 申请日期 1991.08.01
申请人 CARLSTEDT ELEKTRONIK AB 发明人 CARLSTEDT, LARS, GUNNAR
分类号 G06F7/00;G06F7/38;G06F7/483;G06F7/57;G06F9/302;G06F9/44;G06F12/00;G11C11/40;G11C11/412;G11C11/417;G11C11/419;G11C15/04 主分类号 G06F7/00
代理机构 代理人
主权项
地址