| 摘要 |
PURPOSE:To avoid excess control and to suppress jitter by comparing a phase of a master clock with a phase of a slave clock and interrupting a loop of a PLL circuit when it is detected that the phase difference is a prescribed phase difference or below thereby applying self-running to a voltage controlled oscillator. CONSTITUTION:A low frequency output of an output of a phase comparator 1 comparing a phase of a master clock fM with a phase of a slave clock fS is outputted from a low pass filter 2 and given to a voltage controlled oscillator 3 as its control voltage. When a control stop phase discrimination circuit 11 detects it that the phase difference reaches a control stop phase or below, a switch 21 is opened to drive the voltage controlled oscillator 3 in a free running way, resulting that the phase is deviated and the phase difference reaches a control start phase or over. When a control start phase discrimination circuit 12 detects it, the switch 21 is closed to control the voltage controlled oscillator 3. |
