| 摘要 |
A data input circuit for dual access port storage device comprises a data latching pulse generator (20), a latching circuit (30) serving to produce a second data latching pulse, and an input buffer (10), so that it is possible to prevent the appearance of invalid multiple selection phenomena, or IMS phenomena, caused by the large number of data input signals of indeterminate state, by latching the width of the data latching pulse correspondingly with that of the block write signals when the dual access port storage device executes a block write mode. <IMAGE>
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