发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device provided with an amplifier circuit in which speed of actual operation is increased and operation margin is improved. SOLUTION: A selecting circuit is provided for first and second latch circuits performing operation in response respectively to first and second operation timing signals, first operation in which a signal corresponding to a first output signal of the latch circuit is transmitted to a third output terminal and second operation in which a second output signal is transmitted to the third output terminal instead of the first output signal when the first output signal is different from the second output signal of the second latch circuit are performed by these selecting circuits, the second operation timing signal is generated behind the first operation timing signal, also, an operation period of the second latch circuit is shortened at the time of the first operation as necessary.
申请公布号 JP2001312886(A) 申请公布日期 2001.11.09
申请号 JP20000126813 申请日期 2000.04.27
申请人 HITACHI LTD 发明人 FUJISAWA HIROKI;HORIGUCHI SHINJI
分类号 G11C11/409;G11C7/10;G11C7/22;G11C8/18;G11C11/401;G11C29/34;(IPC1-7):G11C11/409;G11C29/00 主分类号 G11C11/409
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