| 摘要 |
<p>PURPOSE:To accelerate the speed of arithmetic operation by executing discrete Fourier transformation a first, a third, a second, and a fourth signal sequences in this order as input signal sequences, multiplying obtained frequency converted data by a complex number in order from the data of low order, and making them output signal sequences. CONSTITUTION:The subject device is constituted of a circuit 1 to obtain the first signal sequence consisting of N-points and the second signal sequence consisting of N-points from the input signal sequence consisting of N-points, the circuit 2 to obtain the third signal sequence consisting of N-point and the fourth signal sequence consisting of N-points from the input signal sequence consisting of N-points, the circuit 3 to give the discrete Fourier transformation (DFT) of 4N-points to the first, the third, the second, and the fourth signal sequences in this order as considering them the input signal sequences, and the circuit 4 to multiply the frequency converted data obtained by the circuit 3 by the complex number in successively starting with the data of low order. Then, the output signal of the circuit 4 becomes the output signal of the device. Thus, the speed of arithmetic operation is accelerated.</p> |
