| 摘要 |
PURPOSE:To obtain a vertical memory cell to be miniaturized for use in a gigabit class ultrahigh integrated DRAM by electrically insulation-isolating a hollow cylindrical single crystalline region to become an active region from a substrate body by digging the substrate up to an insulating film formed previously in the substrate, and deciding the thickness in a self-alignment manner. CONSTITUTION:Each memory cell is covered with an oxide film 9. A channel region 22 in which an impurity region or more particularly a diffused layer is not disposed at a substrate side is formed of a single crystal in such a manner that channel diffused regions 23, 24, bit lines 20, 28 are connected to the electrodes 15 of capacitors in a self-alignment manner, and a word line electrode 30 is further connected to a gate electrode 26 in a self-alignment manner. The diameter of a trench is increased in the substrate, the inner wall is covered with an oxide film, the substrate is then dug to the oxide film to form a hollow cylindrical silicon single crystalline substrate, and the channel is further connected to one electrode of a capacitor formed in the extended trench in a self- alignment. Then, both the channel region and the capacitor region are covered with the oxide film to realize a vertical memory cell. |
