发明名称 MULTIPLIER
摘要 PURPOSE:To detect the presence or the absence of the occurrence of overflow by detecting the overflow of the product of a coded number based on the most significant bit of a partial product and the value of a carrying attended with accumulating operation. CONSTITUTION:An overflow detection circuit 11 detecting the occurrence of the overflow based on the most significant bit of a multiplicand register 4, all the bits of a multiplier register 1 except the least significant bit, lower-order three bits among the overflow accompanying shift operation in a barrel shifter 5, the most significant bit of the output of the shifter 5, the most significant bit and the carrying from a next bit of an arithmetic circuit 7, and the most significant bit of a partial product register 6 is provided, and the finish of processing is decided by a finish decision circuit 10. Accordingly, the presence or the absence of the occurrence of the overflow of coded and non-coded multiplication in the case a product is represented by length equal to the number of the bits of the register 4 can be detected without increasing the number of processing steps.
申请公布号 JPH03286225(A) 申请公布日期 1991.12.17
申请号 JP19900086509 申请日期 1990.03.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SUZUKI MASATO
分类号 G06F7/38;G06F7/52;G06F7/523 主分类号 G06F7/38
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