发明名称 DIGITAL FILTER CIRCUIT
摘要 <p>PURPOSE:To suppress the increase of a circuit scale when processing is divided into multi-phase and implemented in parallel by providing a switching means applying offset subsampling and a means controlling the switching and implementing the offset subsampling in this digital filter circuit. CONSTITUTION:The inside of the digital filter circuit is provided with a means dividing an input signal into multi-phase, that is, a switching circuit 2, and a means 3 controlling the switching sequence of the switching circuit 2, that is, the switching of the switching circuit 2 so as to implement off-set subsampling in the digital filter circuit. Thus, the increase in the circuit scale attended with the constitution dividing the processing in multi-phase so as to allow the digital filter circuit to cope with high speed processing is suppressed.</p>
申请公布号 JPH03261212(A) 申请公布日期 1991.11.21
申请号 JP19900060254 申请日期 1990.03.12
申请人 MATSUSHITA ELECTRIC IND CO LTD;NIPPON HOSO KYOKAI <NHK> 发明人 AONO HIROAKI;TAKAHASHI KIYOSHI;TANAKA AKIYOSHI;OTSUKA YOSHIMICHI
分类号 H04N19/00;H03H17/02;H04N19/42;H04N19/423;H04N19/436;H04N19/59;H04N19/80;H04N19/85 主分类号 H04N19/00
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