发明名称 SEMICONDUCTOR MEMORY CIRCUIT DEVICE HAVING GATE ARRAY MEMORY CELL
摘要 PURPOSE:To amplify read data of a memory cell and output it to an output line without changing a transistor size so as to improve driving ability and reduce read-out time by employing a memory cell equipped with an output signal amplifying means on an output stage. CONSTITUTION:While a data holding unit A holds data before performing read- out operation, when a read-out signal rises by an H level from a read-out signal line 25, voltage applied to an output line 29 drops to a low reference level (Lo) by turn-ON of an N-channel MOS transistor Tr2. At the same time base potential of a bipolar transistor Tr1 is dropped to the L, level via a resistor R1 to have the transistor Tr1 turned OFF. Then when the read-out signal drops to the L level, the transistor Tr2 is turned OFF to have a transmission gate 26 opened. Data held in the data holding unit A is applied to the transistor Tr1, which is then turned ON. Thus the transistor Tr1 amplifies the held data and outputs its output data to the output line 29.
申请公布号 JPH03250664(A) 申请公布日期 1991.11.08
申请号 JP19900045518 申请日期 1990.02.28
申请人 TOSHIBA CORP;TOUSHIBA MAIKURO EREKUTORONIKUSU KK 发明人 HARA HIROYUKI;WATANABE YOSHINORI
分类号 H01L27/118;G11C7/06;G11C8/16;G11C11/419;H01L21/82;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L27/118
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