发明名称 DECODER
摘要 A separate operational section for determining the degree of a polynomial is provided to increase the process speed in determining both error locator and evaluator polynomials. When a received word is decoded based on the error location found, the received word is stored in a memory and corrected and output through the designation of the address. The formula (t - 1) is derived from the error locator equation and the value of which satisfies ?(.alpha.) = O is determined to increase the process speed. The decoder and the encoder share part of the hardware to make the system compact.
申请公布号 CA1291819(C) 申请公布日期 1991.11.05
申请号 CA19870540041 申请日期 1987.06.18
申请人 YOSHIDA, HIDEO 发明人 YOSHIDA, HIDEO;INOUE, TOHRU;YAMAGISHI, ATSUHIRO;NISHIJIMA, TOSHIHISA;ODA, YOSHIAKI;OZAKI, MINORU
分类号 H03M13/03;H03M13/15 主分类号 H03M13/03
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