The edge detector uses a line integrator (21) and a parallel column integrator (S1) supplied with the video signal (Vs) provided by a CCD image converter (Bw) via an A/D converter (ADU). The line integrals (Zk) and column integrals (Si) provided by the two integrators (Z1,S1) are fed respectively to line storage locations (Zsp) and column storage locations (SSp) for evaluation by a processor (Re) to detect the image edges. The two integrals (Zk,Si) are coupled to the processor (Re) via a multiplexer (Mp) feeding a buffer memory (Ps) which is addressed by the processor (Re).
