| 摘要 |
<p>An electrical circuit for producing a digital value which is representative of instantaneous phase of an electrical input signal relative to a reference frequency signal. The circuit includes a digital counter for continuously generating a stored count representing a value resulting from dividing the reference frequency signal by a repeating count cycle frequency which is of the same order as an expected center frequency of the electrical input signal. A trigger unit produces a trigger pulse in response to the trigger unit receiving a sampling pulse and a transition edge of the electrical input signal. An intermediate register stores a momentary state of the counter circuit in response to receiving the trigger pulse. The momentary state of the counter circuit corresponds to an instantaneous phase value of the electrical input signal. A correcting circuit is provided for correcting a resulting numerical value in the intermediate register by removing an accumulating phase offset value. An output register is provided for storing the corrected resulting numerical value of the counter circuit.</p> |
