TEST CIRCUIT FOR MEASURING SPECIFIC CONTACT RESISTIVITY OF SELF-ALIGNED CONTACTS IN INTEGRATED CIRCUITS

摘要

A test circuit is described for measuring the specific contact resistively rc of selfaligned electrodes contacting underlying diffused regions at a major surface of an underlying semiconductor wafer, as well as the sheet (lateral) resistance r? of the underlying diffused regions in some embodiments. The test circuit illustratively includes a pair of test MOS or other type of transistors advantageously made by a self-aligned metallization process simultaneously with the other MOS or other type of transistors to be tested. The two test transistors share a common diffused region, a self-aligned common controlled electrode contacting a diffused region underneath it, and a common control electrode. During test operation, both test transistors are kept ON by means of an applied above-threshold control voltage (Eg), while a current source forces current through one of the transistors. The resulting voltage (Vc), developed across the common controlled electrode and the controlled electrode of the other transistor is a measure of the specific contact resistivity thereat.