发明名称 MANUFACTURE OF SELF-ALIGNMENT TYPE TRANSISTOR MATRIX
摘要 <p>PURPOSE:To facilitate cutting of an operating semiconductor layer between a gate electrode and bus lines by a method wherein a junction part between the gate electrode and the gate bus line is so formed as to have a width small enough to make a light creep over the whole junction part when it is exposed from the rear and hence a resist film on the junction part can be exposed. CONSTITUTION:If a self-alignment method wherein positive type photoresist is exposed by rear exposure with a gate electrode G and a gate bus line GB as masks is applied, a photoresist film on a junction part J is exposed and the resist film is not formed on the part. Therefore, a part of a channel protective film 5 on the junction part J is removed in an etching process for the channel protective film 5 with the photoresist film as a mask and an operating semiconductor layer 4 is exposed. With this constitution, the operating semiconductor layer 4 on the junction part J can be removed in a series of manufacturing processes without using an additional photomask, so that the manufacturing processes can be simplified and the possibility of the decline of an yield can be reduced.</p>
申请公布号 JPH03196640(A) 申请公布日期 1991.08.28
申请号 JP19890339584 申请日期 1989.12.26
申请人 FUJITSU LTD 发明人 KAWAI SATORU;INOUE ATSUSHI;NAGAHIRO NORIO
分类号 G02F1/1343;G02F1/136;G02F1/1368;H01L21/336;H01L27/12;H01L29/78;H01L29/786 主分类号 G02F1/1343
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