| 摘要 |
PURPOSE:To obtain synchronization in a short time by providing a timing instruction means applying the timing instruction of a pseudo random(PN) pattern and shifting a pattern generated by a pseudo random pattern generating means one digit by one digit when no synchronization is taken. CONSTITUTION:A timing instruction circuit 10 instructing the timing of the start of a built-in PN pattern is provided in a DLL(Delay Locked Loop), e.g. in a voltage control circuit. In the case of synchronization holding at the reception, at first a PN pattern from a PN pattern generator 5 is outputted with the timing from the timing instruction circuit 10 to check whether or not the DLL is locked, that is, synchronization holding is implemented or not. When the loop is not locked, the timing of start of the built-in PN pattern is delayed by one clock. Thus, the time required for the DLL till it is locked is shortened. |
