| 发明名称 |
Insulated-gate type integrated circuit. |
| 摘要 |
<p>A P-well region (11) is provided in a semiconductor substrate (10) of N-type. A P-channel MOSFET is arranged in the N-type substrate (10) while an N-channel MOSFET is arranged in the P-well region (11). The drain regions (14, 15) of their respective MOSFETs consist of high concentration impurity diffused regions (21, 23) and low concentration impurity diffused regions (22, 24) arranged about their respective high concentration impurity diffused regions. Also, a drain electrode (17) is provided to cover at above the entire of the high and low concentration impurity diffused regions (21, 23, 22, 24). <IMAGE></p> |
| 申请公布号 |
EP0441390(A2) |
申请公布日期 |
1991.08.14 |
| 申请号 |
EP19910101760 |
申请日期 |
1991.02.08 |
| 申请人 |
KABUSHIKI KAISHA TOSHIBA;TOSHIBA MICRO-ELECTRONICS CORPORATION |
发明人 |
TAKAHASI, TSUTOMU, C/O INTELLECTUAL PROPERTY DIV.;SUYAMA, TAKESHI, C/O INTELLECTUAL PROPERTY DIV.;SUZUKI, SATOSHI, C/O INTELLECTUAL PROPERTY DIV.;ABE, ISAO, C/O INTELLECTUAL PROPERTY DIVISION;SUEDA, AKIHIRO, C/O INTELLECTUAL PROPERTY DIVISION |
| 分类号 |
H01L21/8234;H01L21/8238;H01L27/088;H01L27/092;H01L29/06;H01L29/40;H01L29/78 |
主分类号 |
H01L21/8234 |
| 代理机构 |
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代理人 |
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