发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING OUTPUT BUFFER |
摘要 |
A semiconductor integrated circuit having a test mode in addition to a normal mode, includes a mode detecting circuit (14) for detecting a state of each mode and generating a mode signal, a prebuffer circuit (12) for receiving the mode signal generated by the mode detecting circuit, amplifying an input signal by using an output driving capacity corresponding to the mode signal, and outputting the amplified signal, and an output buffer circuit (13) for receiving an output from the prebuffer circuit and outputting data outside the integrated circuit. |
申请公布号 |
EP0350943(A3) |
申请公布日期 |
1991.07.24 |
申请号 |
EP19890112945 |
申请日期 |
1989.07.14 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
ATSUMI, SHIGERU INTELLECTUAL PROPERTY DIVISION;TANAKA, SUMIO INTELLECTUAL PROPERTY DIVISION;MIYAMOTO, JUNICHI INTELLECTUAL PROPERTY DIVISION;OHTSUKA, NOBUAKI INTELLECTUAL PROPERTY DIVISION;IMAMIYA, KENITI INTELLECTUAL PROPERTY DIVISION |
分类号 |
G01R31/317;G06F11/00;G11C7/10;G11C29/34;G11C29/46;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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