发明名称 Transistor circuit and level converting circuit.
摘要 <p>A transistor circuit has a first and a second transistor (Q1,Q2) differentially connected with each other and having bases receiving an input signal therebetween; a first and a second resistor (R1,R2) respectively connected between collectors of the first and second transistors and a first power supply terminal (VCC); a third transistor (Q9) having an emitter receiving a voltage dropped by the first resistor (R1) and a collector connected to an output terminal (Vo); a fourth transistor (Q8) having an emitter receiving a voltage dropped by the second resistor (R2); and a fifth transistor (Q4) having a collector connected to the output terminal (Vo) and an emitter connected to the second power supply terminal (GND). Biasing voltages are provided to bases of the third and fourth transistors (Q9,Q8) thereby causing the fourth transistor (Q8) to be conductive when the voltage dropped by the first resistor (R1) is larger than the voltage dropped by the second resistor (R2) and causing the third transistor (Q9) to be conductive when the voltage dropped by the first resistor (R1) is smaller than he voltage dropped by the second resistor (R2). The fifth transistor (Q4) become conductive when the fourth transistor (Q8) is in a conductive state. The circuit is capable of operating in a high speed and the output amplitude is such that the low level can be lower to a point just before the saturation of the fifth transistor (Q4) and the high level can be raised near to the power supply voltage. The power supply voltage required to the circuit is substantially reduced. &lt;IMAGE&gt;</p>
申请公布号 EP0435335(A1) 申请公布日期 1991.07.03
申请号 EP19900125725 申请日期 1990.12.28
申请人 NEC CORPORATION 发明人 FUKUDA, SHINRI, C/O NEC CORPORATION;ISHII, EIICHI
分类号 H03K19/013;H03K19/018;H03K19/086 主分类号 H03K19/013
代理机构 代理人
主权项
地址
您可能感兴趣的专利