发明名称 HIGH-RESOLUTION SAMPLE CLOCK GENERATOR PROVIDED WITH DEGRRICHAR
摘要 PURPOSE: To apply extremely fine resolution for restoring data from a received signal by providing a multi-phase clock generator, phase commentator, and clock deglitcher. CONSTITUTION: An N stage ring oscillator 12 in a multi-phase clock generator 10 generates an N clock signals 13 having a phase relation with equal intervals, and supplies them to an N-ary multiplexer 20 in a phase commutator 18. Also, each frequency of the signals 13 is locked to the frequency of a basic crystal clock 14 by an analog phase lock loop 16 as a feedback signal from the oscillator 12. Next, a clock deglitcher 24 removes spike in a multiplexer signal 23 (phase clock signal) selected by the multiplexer 20 through delay stages 26 and 28 and an NAND gate 30. Thus, at the time of restoring data from a sample clock received signal, extremely fine resolution can be applied to a clock step operation.
申请公布号 JPH03141723(A) 申请公布日期 1991.06.17
申请号 JP19900161470 申请日期 1990.06.21
申请人 NATL SEMICONDUCTOR CORP <NS> 发明人 HII UONGU;JIIZASU GINIA
分类号 H03L7/00;H03L7/099;H04L7/00;H04L7/033 主分类号 H03L7/00
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