发明名称 Semiconductor memory having stacked capacitor
摘要 A megabit dynamic random access memory realizing high integration and high reliability is disclosed. The need for an allowance for photomask alignment which is carried out to produce a stacked capacitor memory cell is eliminated. The plate electrode of each memory cell is isolated from the corresponding data line in a memory array by means of an insulating film which is self-alignedly provided around the plate electrode.
申请公布号 US5012310(A) 申请公布日期 1991.04.30
申请号 US19900566315 申请日期 1990.08.13
申请人 HITACHI, LTD. 发明人 KIMURA, SHINICHIRO;KAWAMOTO, YOSHIFUMI;KAGA, TORU;SUNAMI, HIDEO
分类号 H01L27/10;H01L21/8242;H01L27/108 主分类号 H01L27/10
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