发明名称 TEST CIRCUIT FOR ARITHMETIC UNIT
摘要 PURPOSE:To test a computing element in a short time by deciding whether or not the coincidence is secured between the output values of all data output terminals and those of all carry output terminals of plural computing elements and outputting the result of decision. CONSTITUTION:When a test mode setting signal T is inputted from outside, a diagnostic control circuit 2 outputs a selector control signal d3 to make selectors 17 - 24 and 36 select the test data respectively together with the test data d0 - d3 of the prescribed value. Based on the signal d3, the selectors 17, 19, 21 and 23 select the test data d1, the selectors 18, 20, 22 and 24 select the test data d0, and the selectors 33 - 36 select the test data d2 respectively. Thus the computing elements perform the prescribed computing operations to the test data d0 - d2. As a result, the carry signals r1 - r4 and the output data f0 - f3 are all set at the same value. Then the elements 42 - 45 can be tested in a short time.
申请公布号 JPH0384638(A) 申请公布日期 1991.04.10
申请号 JP19890221357 申请日期 1989.08.28
申请人 NEC IBARAKI LTD 发明人 AWANO NOBUHISA
分类号 G06F7/38;G06F7/499;G06F7/50;G06F11/22 主分类号 G06F7/38
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