发明名称 DEPOSITION OF INSULATING LAYER ON THE CONDUCTIVE LAYER OF MULTILAYER INTERCONNECTION NETS CONSISTING OF EACH CONNECTING PLATE FOR HIGH DENSITY INTEGRATED CIRCUIT AND CONNECTING PLATE OBTAINED BY DEPOSITION THEREOF
摘要 <p>PURPOSE: To obtain a flat surface regardless of the height of the pillar of an underlying conductor layer by forming an insulation layer of a material having a planarization rate for obtaining such a surface as the maximum height at a step part is substantially equal to or shorter than a desired value. CONSTITUTION: An insulation layer of polymerizable material is formed on a conductor layer 16 and a small quantity of polyamine acid paste, for example, is deposited thereon. The paste has a planarization rate DOP of 0.4. The conductor layer 16 is coated uniformly with the paste to obtain a paste layer 22" of thickness T"1 on the reference plane 15a. Subsequently, the paste layer 22" is prebaked. The solidified polyamine acid layer 22 has a thickness T'1 which is considerably thinner than the thickness T"1 of the layer 22". Height of corresponding step parts s'1, S'1 is decreased at the same ratio. A plurality of unit layers 23, 24, 25 are formed sequentially until an upper surface 25a including steps s4, S4 having maximum height substantially equal to or shorter than a desired value V is obtained.</p>
申请公布号 JPH0364993(A) 申请公布日期 1991.03.20
申请号 JP19900201017 申请日期 1990.07.27
申请人 BULL SA 发明人 FUIRITSUPU SHIYANTOREENU;MARUTA ZORITSURA
分类号 H05K3/00;H05K3/24;H05K3/46 主分类号 H05K3/00
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