CONNECTION OF LOGIC CIRCUIT'S DELAY EVALUATION

摘要

It falls within the area of measuring integrated circuits made to order. It enables the evaluation of dynamic parameters of logic circuits on logical function tester. The principle consists in the fact that the signal from the output of the input converter expands across the measured logical converter and concurrently across the basic logical element to inputs of the evaluating flip flop circuit of RS type. The flip flop circuit is set to one of states in dependence on difference in delay in both branches and the output of the output converter will show the level H or L.<IMAGE>