发明名称 Mask-ROM manufacturing method.
摘要 <p>A manufacturing method of a mask-ROM of two-layered gate electrode structure is provided. With this method, a cell transistor having a first-layered gate is converted into the depletion type according to data to be stored in the following manner. That is, a first conductive layer (32) is insulatively formed over a semi-conductor substrate (10) of a first conductivity type, a silicon nitride film (36) is formed on the first conductive layer (32), a polysilicon film (38) is formed on the silicon nitride film (36), the polysilicon film (38) is patterned and then altered into a silicon oxide film (46) so as to increase its volume, and the silicon nitride film (36) is patterned with the silicon oxide film (46) used as a mask to form windows (48) for permitting impurity to be doped therethrough. Then, impurity (54) for converting cell transistors into the depletion type according to data to be stored is doped from the windows (48) into the substrate (10) through the first conductive layer (32).</p>
申请公布号 EP0413353(A2) 申请公布日期 1991.02.20
申请号 EP19900115805 申请日期 1990.08.17
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NARUKE, YASUO, C/O INTELLECTUAL PROPY DIV., K.K.
分类号 H01L27/112;H01L21/033;H01L21/225;H01L21/28;H01L21/8246 主分类号 H01L27/112
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