Digital phase-locked loop (PLL).

摘要

A digital Phase-Locked Loop (PLL), comprising a voltage-controlled oscillator (VCO) and a phase meter including a delay line with taps, wherein phase measurements are effected by sending a phase through the delay line and determining the location of this pulse in the delay line at the rate of the output signal of the VCO. This location is determined by a processing circuit connected to the taps, which circuit generates in response to the location found a VCO control signal corresponding therewith.