MEMORY BUILT HIERARCHIALLY FROM MEMORY CELL

摘要

PURPOSE: To reduce the cost required in a circuit by the supply of a strong cell signal by making plural hierarchy structures also applicable to a static memory and thereby making critical the area cost of a driving and calling circuit inside a first hierarchy level. CONSTITUTION: An input and output circuit D1I/O is arranged correspondingly in all lines of an 8×8 memory cells on the hierarchy level H1 of a static 64K memory having a hierarchy architecture, while an input and output circuit D2I/O exists in each one data on other hierarchy level H2 for each line of 64 memory cell element. In addition, a data input/output I/O is correspondingly arranged in one line of a 4K memory block on a hierarchy level H3. Further, the data line of the third level H3 is connected to an amplifier and a temporary memory V that enable intended write and read against the static memory.