| 摘要 |
An arrangement for generating a binary pulse code in which pulses appear as pseudo-random numbers, the pulse code preferably being used for ciphering binary information, comprises a number of shift registers in which the output of one or several stages is connected to the input of the first stage of the register via logical circuits, the registers being cyclically shifted from a common pulse generator. The input of the first stage of each shift register is also connected to one input of a gate. The gates are interconnected so as to form a chain in which each gate has one input connected to the output of the preceding gate, and the other input being connected to the appertaining shift register. Each second gate is an AND-gate and each other second gate is an exclusive-OR-gate, the output of the last gate in the chain constituting the output of the arrangement.
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