CIRCUIT FOR CYCLE CONTROL AND INFORMATION TRANSMISSION FOR TWO-PORT MEMORY DEVICE

摘要

The solution concerns the design of the connection of a cycle control circuit and of information transfer from a two-port memory device.The principle of the device is a connection that determines the time interval of internal occupation and the time interval of the active cycle of the memory device performed in an initialisation write mode, in a restoring mode, in word write mode, in lower or upper syllable write modes, in a read mode and in a read-modified write mode. The proposed connection ensures the information transfer control amongst the dynamical memory, circuit of the AM 2960 type for error detection and correction and isolation circuits on the interface of the internal bus of the memory device and the two independent buses of the computer system. The connection of the circuit can be realized as a monolithic integrated circuit on the basis of the gate array HP200, is designed for use in digital two-port memory devices in microcomputers and minicomputers in which the information is secured by automatic error detection and correction.<IMAGE>