| 摘要 |
A process for forming a single trench MOS transistor/capacitor cell for analog signal processing, and the resulting structure, are disclosed. The transistor is formed by forming a first trench (31) in the semiconductor substrate, lining the trench with a layer of insulating material (33), a layer of conducting material (35), and filling the trench with a layer of insulator (41). A doped region is formed adjacent the trench, which serves as a transistor source (21). A second trench (32) is then formed which extends through and excavates a portion of the first trench. The second trench is lined with a layer of doped material (43) and insulator (45). The doped material (43) is isolated from the conductive layer (35) lining the first trench (31). The second trench (32) is then filled with a body of conductive material (47). The layer of doped material (43) lining the second trench serves as the transistor drain and a capacitor output is extracted from the body of conductive material (47). |
