发明名称 CONTROL CIRCUIT
摘要 PURPOSE:To form a signal conducted and interrupted in a different timing by employing a circuit forming an inverted signal at a delay time for a circuit driving two transistors(TRs). CONSTITUTION:An original signal is inputted to a reset input of a latch circuit 4, which is reset when the original signal is at a low level and an output terminal 14 goes to an L. An inversed signal of the original signal is inputted to a reset input of a latch circuit 5, which is reset when the original signal is at a high level H and the output terminal 15 goes to L. The level of the input terminal of both the latch circuits 4,5 is fixed to H and the output terminals 14, 15 go to H when latch enable terminals 10, 11 go to L. When the terminals 10, 11 go to L once, the latch circuit is active even when the level of the terminals 10, 11 change to H and the output terminal keep the level H till the level of the reset terminal goes to L next. The terminals 10, 11 go to L with a delay time 19 of a circuit 1, which outputs a pulse with a delay time synchronously with an input signal. Thus, the output terminals 14, 15 go to L for this period thereby forming a period when transistors(TRs) 2, 3 of a push-pull circuit are both turned off.
申请公布号 JPH02243015(A) 申请公布日期 1990.09.27
申请号 JP19890064811 申请日期 1989.03.15
申请人 NEC CORP 发明人 SUGAI KAZUMI
分类号 H03K5/151;H03K5/15;H03K17/16;H03K19/0175;H03K19/08 主分类号 H03K5/151
代理机构 代理人
主权项
地址