| 摘要 |
A switching system (SW) to transfer packets of digital signals having a header containing routing information from a plurality of input terminals (R1 to R16) to a plurality of output terminals (T1 to T16), the destination output terminal for a packet being selected according to the routing information of this packet. The system includes a plurality of memories (M1 to M8) which are each subdivided into a plurality of storage areas each associated to a respective output terminal, receiver circuits (RC1 to RC16) to divide each received packet into a plurality of sub-packets, control circuits (CC1 to CC8) and transmitter circuits (TC1 to TC16) to rebuilt a packet from its sub-packets. Under the control of the control circuits operating according to the routing information of a packet the sub-packets belonging to this packet are transmitted to respective ones of the memories and loaded into the storage area thereof corresponding to the destination output terminal. |
