发明名称 CHROMINANCE SIGNAL PROCESSING CIRCUIT
摘要 The circuit has a multiplier (300) receiving a frist signal including a digital chroma signal and multiplying it with a second signal to produce a third signal. A circuit transmits the first signal to the multiplier. A matrix coefficient circuit (200) responds to the third signal to generate a number of matrix coefficients. It has a first selector for selecting the matrix coefficients in time division manner and for producing the second signal. An ACC circuit (301) between the multiplier and the matrix coefficient circuitry produces an ACC signal on application of the third signal.
申请公布号 KR900006491(B1) 申请公布日期 1990.09.01
申请号 KR19850001612 申请日期 1985.03.13
申请人 TOSHIBA CORP. 发明人 SUZUKI SENSENMOO
分类号 H04N9/64;H04N9/67;H04N9/68;(IPC1-7):H04N9/67 主分类号 H04N9/64
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