| 摘要 |
A digital-to-analog converter includes a digital interpolation filter supplied with an original digital signal having a sampling frequency fs and which generates a modified digital signal having a sampling frequency Nfs (N > 1) and a lower bit number than that of the original digital signal. A pulse width modulator supplied with the modified digital signal generates a pulse signal having a pulse width corresponding to that of the modified digital signal. An output buffer is supplied with the output of the pulse width modulator and has a complementary metal oxide semiconductor (CMOS) inverter circuit composed of P channel and N channel transistors 31, 34, 35, 36; 32, 33, 37. A low-pass filter is supplied with the output signal from the output buffer. The digital interpolation filter, the pulse width modulator and the output buffer are formed in an integrated circuit, and one of the P channel and N channel transistors 31, 34, 35, 36; 32, 33, 37 has a circuit 41 for controlling the voltage supplied to the substrate 30 thereof to adjust the resistance value when the transistor is conductive. …<IMAGE>… |
