发明名称 Process for making integrated circuit with doped silicon dioxide load elements
摘要 An integrated circuit which uses vertical current flow through arsenic-implanted oxide films to provide low-current loads. These load elements provide a compact four-transistor SRAM which has very simple fabrication and very low power consumption.
申请公布号 US4950620(A) 申请公布日期 1990.08.21
申请号 US19880252268 申请日期 1988.09.30
申请人 DALLAS SEMICONDUCTOR CORP. 发明人 HARRINGTON, III, THOMAS E.
分类号 G11C11/412;G11C11/417;H01L21/02;H01L21/8244;H01L27/11 主分类号 G11C11/412
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