Semiconductor memory device with stacked capacitor structure and the manufacturing method thereof

摘要

A dynamic random access memory with a stacked capacitor cell structure is disclosed which has a memory cell provided on a silicon substrate and having a MOSFET and a capacitor. An insulative layer is formed on the substrate, and a first polycrystalline silicon layer is formed on this insulative layer. These layers are simultaneously subjected to etching and define a contact hole which penetrates them to come in contact with the surface of the source. A second polycrystalline silicon layer is formed on the first polycrystalline silicon layer to uniformly cover the inner wall of the contact hole and that surface portion of the source which is exposed through the contact hole. The first and second silicon layers are simultaneously subjected to patterning to provide the lower electrode of the capacitor. After a capacitor insulation layer is formed on the second polycrystalline silicon layer, a third polycrystalline silicon layer is formed on the capacitor insulation layer so as to bury a recess of the second polycrystalline silicon layer. The third silicon layer constitutes the upper electrode of the capacitor.