| 摘要 |
PURPOSE:To surely detect the self-running state of a PLL by making a range of a phase difference between an input clock signal and a comparison clock signal quantitatively in the steady-state of the PLL as a window and detecting a phase relation of a clock at the outside of the window. CONSTITUTION:A pulse width tau1 of a 1st pulse signal 33 and a pulse width tau2 of a 2nd pulse signal 34 outputted from timer circuits 20, 21 are set so as to satisfy inequality I. In this case, an output 35 of an AND circuit 22 is at an H level without fail at a point of time of a leading edge of a comparison clock signal 31. In the case of self running state, however, a phase difference tau+ or -DELTAtaubetween an input clock signal 30 and a comparison clock signal 31 is not warranted and a leading edge of the comparison clock signal 31 comes to an L level logic part of an AND output 35. As a result, an L level logic is outputted as the alarm output 40 and the self-running of the PLL is detected. |
