发明名称 CLOCK GENERATING CIRCUIT
摘要 <p>PURPOSE:To obtain a stable output signal with use of a simple circuit by taking the signals with phases adverse to each other out of the input and output terminals of a gate to which a crystal oscillator is connected and adding both signals together and dividing them after applying the level control to these signals and transmitting them through another gate circuit. CONSTITUTION:A crystal oscillator 2 and a high resistance 3 are connected to both ends of the input/output terminals A and B of an inverter 1 together with the capacities 4 and 5 for generation of oscillations. The DC components are deleted by both capacities 6 and 9, and the signals of both terminals B and A are inputted to the inverters 12 and 13. The output signals C and D are added together via a NAND gate 14 for acquisition of a pulse having a frequency double as high as the desired one. This pulse signal is divided down to 1/2 by a frequency divider 15. Thus a pulse of a desired frequency is outputted through an output terminal 16.</p>
申请公布号 JPH02202714(A) 申请公布日期 1990.08.10
申请号 JP19890020742 申请日期 1989.02.01
申请人 TOSHIBA CORP 发明人 TORII KENICHI
分类号 G06F1/04;H03K5/01 主分类号 G06F1/04
代理机构 代理人
主权项
地址