发明名称 Phase synchronous maximum likelihood decoder.
摘要 <p>Disclosed is a phase synchronous type maximum likelihood decoder for memorizing in a memory N number of transmit data series possibly transmitted from transmit side, for adjusting a phase of a partial series of transmit data series transmitted from the transmit side on the basis of the partial series memorized in the memory, for calculating a likelihood for the partial series transmitted from the transmit side on the basis of the partial series memorized in the memory and the partial series having adjusted phase, for comparing N number of calculated likelihood and for selecting a partial series having the maximum likelihood from the memory, thereby, the satisfactory operation in the low S/N ratio can be realized and the satisfactory phase tracking characteristics can be obtained.</p>
申请公布号 EP0380876(A2) 申请公布日期 1990.08.08
申请号 EP19890312820 申请日期 1989.12.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SERIZAWA, MUTSUMU;MURAKAMI, JUNZO
分类号 G06F15/167;G11C7/14;H04L1/00;H04L27/233 主分类号 G06F15/167
代理机构 代理人
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