| 摘要 |
<p>PURPOSE:To facilitate the clock control without using a measuring instrument like an oscilloscope, etc., by setting the transmission lines for inspection of maximum and minimum delay times between the logical units requiring the control of clock skews and performing the automatic inspection of transmission of signals and the automatic control of the clock pulse phase via those transmission lines. CONSTITUTION:The transmission lines 31 and 32 are used for inspection of the maximum and minimum delay times, respectively. It a logica unit 2 is relpaced with another one owing to a trouble or other reasons, a control signal line 52 is set a state secured before replacement of the unit 2 to check whether the signals are normally transmitted or not to the internal flip-flops of the ISI chips 11 and 21 connected to the lines 31 and 32, respectively. If a malfunction is confirmed, the line 52 is switched and the same check is carried out again after the change of the clock pulse phase. These actions are automatically repeated to detect the phase of the clock pulse to secure the transmission of the normal signals. Then the line 52 is fixed at a satisfactory state. Thus the clock control is facilitated.</p> |
