| 摘要 |
PURPOSE:To detect an optional number of address signals which are used to form a loop for a test of the data transmission system, by varying the number of stages of a shift register with the control signal. CONSTITUTION:A timer circuit 21 decides the number of bits of the detection codes like the loop forming code, the address code, the mode code, etc. and produces and transmits the 1st control signal used to detect the detection codes equivalent to the number of bits to a polynomial deciding circuit 22. The circuit 22 supplies control signals 10m-1-102 to a stage number deciding circuit 1 consisting of selectors 12-1m-1 that decide the number of stages of a descrambler via AND circuits 22-2m-2, in response to the 1st control signal. At the same time, the circuit 22 supplies the control signal 13 for decision of feedback stage number to a feedback stage number deciding circuit 4 consisting of selectors 41- 4m-1 which decide the number of feedback stages via AND circuits 51-5m-1 in response to the 1st control signal. |
