发明名称 Multi-zone semiconductor DRAM - has connection areas with connecting lines on layers, crossing over memory layers
摘要 Two storage devices are formed on a chip from preselected layers. A driver circuit or a store driver is formed on the chip for driving the two storage devices, the two devices being respectively on the one and the other side of the driver. One or more connection areas are formed on the chip to receive externally introduced signals, and predetermined potentials. One or more connecting lines are formed of a layer different to the preselected layers, and are in circuit between the connection areas and the driver, the connecting lines being so formed that these cross one of the first and second storage devices. Pref. each storage device comprises a storage matrix arranged in blocks with bit and word lines, the word lines having plural low resistance lines coupled to them. ADVANTAGE - No increase in chip area due to lines.
申请公布号 DE3939314(A1) 申请公布日期 1990.06.07
申请号 DE19893939314 申请日期 1989.11.28
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 KONISHI, YASUHIRO;KUMANOYA, MASAKI;DOSAKA, KATSUMI;KOMATSU, TAKAHIRO;INOUE, YOSHINORI, ITAMI, HYOGO, JP
分类号 G11C11/41;G11C11/401;G11C11/4074;G11C11/408;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C11/41
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