| 摘要 |
PURPOSE:To obtain a magnification signal with an optional magnification with simple circuit constitution by combining plural clocks so as to attain a designated magnification so as to generate a magnification block and using the magnified clock thereby controlling the readout and write control of the memory. CONSTITUTION:The generator consists of a clock generation section 21, a clock selection signal generating section 22, a timing signal output section 23 and a selection section 24. The clock generating section 21 has an original clock generator 25 generating a basic clock and frequency division clock generators 26-28 to obtain a basic clock and plural frequency division clocks. Then in response to the designated magnification, a selection signal to decide which clock are to be combined is outputted from a control section. A magnification clock generating means combines prescribed clocks by the selection signal to generate a magnification clock and the clock is outputted as a read clock or a write clock. Thus, the signal is magnified or reduced in an optional magnification with simple constitution. |
