| 摘要 |
A memory protection arrangement comprises a controller, a memory, first and second memory address self-hold circuits, first and second address comparators and a memory write signal controlling gate. The controlling gate is responsive to the output signal of the second comparator to control memory write such that a current address falling within a range between memory addresses of the first and second memory address self-hold circuits inhibits the memory from being written. The controller then performs an abnormality processing to stop the operation. The operation is stopped as soon as a write signal develops in a program area in the event that the program is caused by a terminal device to tend to undergo runaway and the program is protected from destruction. Through initialization by turn-on of a power supply, the program can be started to process with the operation.
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