发明名称 DATA PROCESSING SYSTEM USING ADDRESS CONVERSION
摘要 An address selector is connected to an address bus, a memory and an input/output unit. A physical address is fed to the memory from an address converter without any modification of the address. Logical addresses are fed to the memory from the input/output unit via a second address converter. Pref. the address selector contains a circuit to select either the physical address from the first converter or the logical address from the input/output unit depending on the value of a given address bit on the address bit.
申请公布号 KR900002894(B1) 申请公布日期 1990.05.03
申请号 KR19870004837 申请日期 1987.05.16
申请人 HITACHI LTD;HITACHI MICRO COMPUTER ENGINEERING CO LTD 发明人 KONDO MEGURU;KAMIYA SHUJI;HUGUOGA KAZUHIGO;SHINOZAGI MASAZUGU;SADAMIZU HIDOSHI
分类号 G06F12/10;G06F13/12;(IPC1-7):G06F12/10 主分类号 G06F12/10
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