发明名称 CIRCUIT AND METHOD OF PREDICTING STICKY BIT VALUE
摘要 PURPOSE: To shorten delay in the multiplication operation of a processor by executing a parallel processing system for deciding a sticky bit while finding the product of two decimal parts for the processor. CONSTITUTION: A trailing zero encoder 11 receives the decimal part of a multiplicand and a trailing zero encoder 12 receives the decimal part of a multiplier, and the number of following zero contained in the decimal parts of respectively correspondent operands is decided. The trailing zero encoders 11 and 12 are inputted to a carry preservation adder 13. Further, a constant is inputted to the carry preservation adder 13. This constant is set so as to generate the execution of a carry look ahead circuit 16 when the sticky bit is '0'. Two outputs C and S of the carry preservation adder 13 are inputted to the carry look ahead circuit 16 and the sticky bit is decided there.
申请公布号 JPH02115928(A) 申请公布日期 1990.04.27
申请号 JP19890220508 申请日期 1989.08.29
申请人 INTEL CORP 发明人 DEBITSUDO GARUBI;RESU KOON
分类号 G06F7/38;G06F7/487;G06F7/508;G06F7/52;G06F7/74 主分类号 G06F7/38
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