| 摘要 |
<p>PURPOSE:To establish frame synchronization with less number of parts and to detect out of synchronism by comparing a phase of a window waveform with a phase of an input frame signal and matching the phase of an output and input frame signals in the case of dissidence. CONSTITUTION:A memory 18 is controlled by address information generated by a counter 17 from an output of a VCO 16, a phase difference between a phase comparison clock CLK and an input clock IN from the memory 18 is detected by a comparator 14 and an output clock OUT is obtained through an LPF 15 as a control voltage of the VCO 16. An output frame signal FO and a window waveform W are stored in the memory 18. When an out of frame synchronism signal ER is detected, an AND gate 20 fetches an input frame signal FI to apply initial setting to a counter 17. The memory 18 is controlled in synchronism with the signal FI and the phase of the signal FO is again coincident with the phase of the signal FI to establish the frame synchronization.</p> |
