Chip to multilevel circuit board bonding

摘要

A process for bonding electrical terminals of an integrated circuit chip to conductive regions of a multilayered circuit board is disclosed, along with the resulting multilayer module. The process comprises forming a plurality of circuit board layers and stacking them to define a well area therein. The well area having a base defined by one of the circuit board layers and sidewalls defined by vertical edge portions of a plurality of the remaining circuit board layers, the conductive patterns having conductive termination regions formed adjacent to the vertical edge portions. Conductive vertical vias are formed along vertical edge portions of a plurality of circuit board layers in electrical communication with the conductive termination regions. Flexible conductive strips are applied to the integrated circuit in electrical communication with the integrated circuit terminals. The conductive strips extend beyond the integrated circuit extend along the conductive vias, and be in electrical communication therewith, as the integrated circuit is disposed within the well area. Board lead connections to integrated circuit terminals are selected by patterning the board leads to contact specific conductive termination regions.