| 摘要 |
PURPOSE:To prevent the effect of noise toward both high and low levels direction by providing plural stages of latch circuits and a NOR circuit and an AND circuit receiving each output signal and using the output signals so as to set and reset a flip-flop circuit. CONSTITUTION:When a high level state of an input signal D is consecutive and the level crosses over the leading of a clock signal CLK twice, output signals of latch circuits 101, 102 are both a high level. Then an output signal of an AND circuit 103 goes to a high level and an output signal A of a flip-flop 105 goes to a high level. Conversely, when a low level state of an input signal D is consecutive and the level crosses over the leading of a clock signal CLK twice, an output signal of the NOR circuit 104 goes to a high level and the output signal A of the flip-flop 105 goes to a low level. If the fluctuation in the input signal D takes place at a shorter time than the time above, the signal A is not fluctuated. Thus, the pulse of the signal A is not divided into two and noise input is prevented. |
