| 摘要 |
PURPOSE:To attain sampling in synchronism with a burst signal of a composite video signal by generating a sampling value series from an address whose incremental value is varied in response to plural counter outputs counting a clock of 13.5MHz with a subcarrier generating circuit. CONSTITUTION:A composite video signal is inputted to a terminal 1 and sampled by a clock generated from a voltage controlled oscillation circuit (VCO)7 at an A/D converter 2. The frequency of the clock is 13.5MHz. The subcarrier generating circuit 8 counts the clock of 13.5MHz by counters 15, 16, 17 and the output of an address counter 9 varying the sum by a sum selection circuit 18 in response to count signals Sa, Sb, Sc is given to a ROM 10 and the sampling value series generated from the ROM 10 is sent to a multiplier 4. The multiplier 4 multiplies the result with a burst signal extracted from a burst gate 3 to obtain a phase error and the error is fed back to the VCO 7 via a D/A converter 5 and an LPF 6. Thus, the sampling is attained synchronously with the burst signal in this way. |
